Low-Priority Queues
1. |
Background |
See this.
2. |
Low-Priority Queues on Danzek |
Two sections below:
- the three queues running on one host-group, including the low-priority one;
- the the required resource quota set, which ensures pre-emption works! (see this).
2.1. |
Queue Config |
M610x-GPU-interactive.q:
qname M610x-GPU-interactive.q hostlist @M610x-GPU seq_no 7 . . . . pe_list NONE rerun FALSE slots 1 . . . . user_lists nvidiaGPU.userset xuser_lists NONE subordinate_list M610x-GPU.q=1, M610x-low-priority.q=1 complex_values nvidia=1,interactive=1 . . . . s_rt 24:00:00 h_rt 25:00:00 . . . . s_vmem INFINITY h_vmem INFINITY
M610x-GPU.q:
qname M610x-GPU.q hostlist @M610x-GPU seq_no 16 . . . . qtype BATCH ckpt_list NONE pe_list NONE rerun FALSE slots 1 . . . . user_lists nvidiaGPU.userset xuser_lists NONE subordinate_list M610x-GPU-interactive.q=1, M610x-low-priority.q=1 complex_values nvidia=1 . . . . s_rt 168:00:00 h_rt 192:00:00 . . . . s_vmem INFINITY h_vmem INFINITY
M610x-low-priority.q:
qname M610x-low-priority.q hostlist @M610x-GPU seq_no 17 . . . . qtype BATCH ckpt_list NONE pe_list smp.pe fluent-smp.pe rerun FALSE slots 12 . . . . subordinate_list M610x-GPU-interactive.q=1 complex_values low_priority=1 . . . . s_rt 168:00:00 h_rt 192:00:00 . . . . s_vmem 2.0G h_vmem 2.1G
2.2. |
RQS Config |
{
name CSF-Hosts-slots.rqs
description NONE
enabled TRUE
limit hosts {@C6100-FAT} to slots=12
limit hosts {@C6100-STD-ib} to slots=12
limit hosts {@C6100-STD-test} to slots=12
limit hosts {@R815} to slots=32
limit hosts {@M610x-GPU} to slots=11
# ... THIS BIT --- 11, not 12...
# ... THIS BIT --- 11, not 12...
limit hosts {@R410-twoday} to slots=12
limit hosts {@R410-short} to slots=12
}